ispLEVER Starter (free download)
- Design entry for VHDL and Verilog HDL
- Precision and Synplify synthesis tools
- IP-Express generate complete modules (Makros)
- Placement and Routing software
ispLEVER Full Version (low extra charge)
- ISP TRACY Logic Analyzer
- Modelsim Simulator
GE_Research Package
- Power supply
- USB cable for programming the board from PC
- Data disk including the manual, various application examples,
test programs and data sheets of all components
- 8052 Design with Keil Monitor System
- LEON3 design with source code, development environment and SnapGear Linux
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Components
- 1x Lattice ECP2-50 FPGA
- 1x Lattice LCMXO2280 CPLD
- 1x Configuration - Flash
- 512 Mb Flash (8M*32) for CPU system
- 8 Mb SRAM (256k*32) for CPU system
- 1x SODIMM for DDR-SDRAM
- 1x USB2.0 HS (FPGA programming, Flash config.)
- 1x JTAG (CPLD und FPGA programming, Flash config.)
- 1x 9-Pin RS232 serial connector
- 1x 15-Pin VGA connector (monitor)
- 1x Ethernet 10/100M, full/half Duplex
- 2x USB2.0 FS Host
- 1x USB2.0 FS OTG
- 2x3 LVDS pairs on SATA connectors
- 1x ext. components for 6-10bit D/A converter
- 1x Hpe expansion connector for 46 usable I/Os
- 1x Prototyping area FPGA
- 1x Power supply connector for 5V DC
- 1x 25MHz oscillator
Human Interface
- 8x LEDs with test-pins for every LED
- 2x 7-character-display
- 1x Green LED (power supply)
- 1x Blue LED (config.done)
- 3x 4 Push button key matrix
- 4x DIP switch
- 1x Single-step button
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