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Macros & Free IPs
We strive to offer technically faultless and low cost solutions to our customers for their own FPGA/ASIC development. After many years of experience in development, we are excellent in the implementation of System on Chip (SoC) designs. We have accumulated a large number of complex macros, some macros we have designed and some have been secured from other sources, which we can provide to our customers free of charge. Our macros are available in Verilog HDL or VHDL. Thus, they are independent in regards to technologies and manufacturers.
On request we are glad to develop user-specific solutions. Due to our close cooperation with polytechnics and universities we have access to a number of solutions, which we offer or give you the corresponding contacts for. By allying with developers of highly complexly macros we provide solutions with an unbeatable cost/performance ratio to our customers. In the following table you can see a summary of the macros most asked for:
CPU macros |
8052 macros |
ARM/LEON macros |
|
| GRLIB ¹ | GERLIB ² | ||
| LEON 2 & 3 | T16550A UART with Fifo´s |
Debug Support Unit | LCD Display Controller Core LCD Display System Core |
| 8052 | TCAN1000 CAN2.0b Controller |
UART 16550 | |
| TETH 10/100 M Ethernet MAC |
IEEE-754 FPU | PTC PWM Timer Counter | |
| 8/16/32 bit PROM/SRAM controller | Watchdog | ||
| 32 bit PC133 SDRAM controller | I2C | ||
| PCI | SPI | ||
| USB1.1 target | |||
| UART | |||
| CAN2.0b | |||
| GPIO | |||
| Interrupt controller | |||
| 1553 BC/RT/MT controller | |||
| ¹ Gaisler Research library |
| ² Gleichmann Electronics Research library |
